추천 제품
형태
crystalline (cubic (a = 5.4037))
wafer
Quality Level
포함
boron as dopant
직경 × 두께
2 in. × 0.3 mm
bp
2355 °C (lit.)
mp
1410 °C (lit.)
density
2.33 g/mL at 25 °C (lit.)
반도체 특성
<111>, P-type
SMILES string
[Si]
InChI
1S/Si
InChI key
XUIMIQQOPSSXEZ-UHFFFAOYSA-N
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물리적 특성
0 vortex defects. Etch pitch density (EPD) < 100 (cm-2). Resistivity 10-3 - 40 Ωcm
Oxygen content: <= 1~1.8 x 1018 /cm3; Carbon content: <= 5 x 1016 /cm3; Boule diameter: 1~8 ″
Storage Class Code
13 - Non Combustible Solids
WGK
WGK 2
Flash Point (°F)
Not applicable
Flash Point (°C)
Not applicable
개인 보호 장비
Eyeshields, Gloves, type N95 (US)
시험 성적서(COA)
제품의 로트/배치 번호를 입력하여 시험 성적서(COA)을 검색하십시오. 로트 및 배치 번호는 제품 라벨에 있는 ‘로트’ 또는 ‘배치’라는 용어 뒤에서 찾을 수 있습니다.
이미 열람한 고객
Journal of nanoscience and nanotechnology, 13(5), 3495-3499 (2013-07-19)
A spin-casting process for fabricating polycrystalline silicon sheets for use as solar cell wafers is proposed, and the parameters that control the sheet thickness are investigated. A numerical study of the fluidity of molten silicon indicates that the formation of
Journal of nanoscience and nanotechnology, 13(5), 3397-3402 (2013-07-19)
We investigated the thin film growths of hydrogenated silicon by hot-wire chemical vapor deposition with different flow rates of SiH4 and H2 mixture ambient and fabricated thin film solar cells by implementing the intrinsic layers to SiC/Si heterojunction p-i-n structures.
Journal of nanoscience and nanotechnology, 13(5), 3559-3563 (2013-07-19)
Silicon sheets were fabricated by a new fabricating method, spin casting with various rotation speeds of the graphite mold. The microstructure of spin-cast silicon sheets were investigated using an electron probe microanalyzer (EPMA) and scanning electron microscope/electron backscatter diffraction/orientation image
Journal of nanoscience and nanotechnology, 13(4), 2451-2460 (2013-06-15)
The physical properties of porous materials are being exploited for a wide range of applications including optical biosensors, waveguides, gas sensors, micro capacitors, and solar cells. Here, we review the fast, easy and inexpensive electrochemical anodization based fabrication porous silicon
Si-nanowire-array-based NOT-logic circuits constructed on plastic substrates using top-down methods.
Journal of nanoscience and nanotechnology, 13(5), 3350-3353 (2013-07-19)
Si-nanowire (NW)-array-based NOT-logic circuits were constructed on plastic substrates. The Si-NW arrays were fabricated on a Si wafer through top-down methods, including conventional photolithography and crystallographic wet etching, and transferred onto the plastic substrates. Two field-effect transistors were fabricated on
문서
Building and Engineering Micro/Nano Architectures of Single-Walled Carbon Nanotubes for Electronic Applications
프로토콜
Negative Photoresist Procedure
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