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  • Si-nanowire-array-based NOT-logic circuits constructed on plastic substrates using top-down methods.

Si-nanowire-array-based NOT-logic circuits constructed on plastic substrates using top-down methods.

Journal of nanoscience and nanotechnology (2013-07-19)
Youngin Jeon, Jeongmin Kang, Myeongwon Lee, Taeho Moon, Sangsig Kim
ABSTRACT

Si-nanowire (NW)-array-based NOT-logic circuits were constructed on plastic substrates. The Si-NW arrays were fabricated on a Si wafer through top-down methods, including conventional photolithography and crystallographic wet etching, and transferred onto the plastic substrates. Two field-effect transistors were fabricated on a single Si-NW array composed of five nanowires aligned in parallel and connected in series to form NOT-logic circuits. The excellent flexibility of the fabricated device was confirmed by bending-cycling tests. The voltage-transfer curve of the NOT-logic circuits showed an inverting operation with a logic swing of -92% and voltage gain of -2.5.

MATERIALS
Product Number
Brand
Product Description

Sigma-Aldrich
Silicon, wafer (single side polished), <111>, P-type, contains boron as dopant, diam. × thickness 3 in. × 0.5 mm
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Silicon, wafer (single side polished), <100>, P-type, contains boron as dopant, diam. × thickness 3 in. × 0.5 mm
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Silicon, wafer (single side polished), <100>, N-type, contains no dopant, diam. × thickness 3 in. × 0.5 mm
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Silicon, wafer (single side polished), <111>, N-type, contains no dopant, diam. × thickness 3 in. × 0.5 mm
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Silicon, wafer (single side polished), <100>, N-type, contains phosphorus as dopant, diam. × thickness 3 in. × 0.5 mm
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Silicon, wafer (single side polished), <100>, N-type, contains phosphorus as dopant, diam. × thickness 2 in. × 0.5 mm
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Silicon, wafer, <111>, P-type, contains boron as dopant, diam. × thickness 2 in. × 0.3 mm
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