Accéder au contenu

Back-gated OFET Interdigitated Substrate Au source/drain, 90 nm SiO2 gate-insulator, varied W/L from 500 to 4000, 16 transistors per chip, chips (diced)

Back-gated OFET Interdigitated Substrate

Back-gated OFET Interdigitated Substrate Au source/drain, 90 nm SiO2 gate-insulator, varied W/L from 500 to 4000, 16 transistors per chip, chips (diced)

Products

Marque

Sigma-Aldrich (1)

Forme physique

Taille de conditionnement

Showing 1-1 of 1

Comparer

Référence du produit

Description

Tarif

FIPMS223

Back-gated OFET Interdigitated Substrate, Au source/drain, 90 nm SiO2 gate-insulator, varied W/L from 500 to 4000, 16 transistors per chip, chips (diced)